[Tracking][sw] Coverage support
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- SystemVerilog
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Description
This issue captures remaining tasks for coverage support. Please see also #3080.
* [ ] Tooling for generating coverage reports.
* [ ] Meson coverage support?
* [ ] CI support.
* [ ] While transferring the profile buffer over UART is reasonable for FPGA, it is probably not the best way for DV. We need to understand its overhead and how we can transfer the profile buffer more efficiently.
* See these comments: [1](https://github.com/lowRISC/opentitan/pull/3080#discussion_r471591293), [2](https://github.com/lowRISC/opentitan/pull/3080#discussion_r472435140).
* [ ] Coverage for tests that run on host, i.e. DIF unittests.
Contributor guide
Research direction
Start by reviewing issue #3080 and the two linked discussions about profile-buffer transfer. Treat the checklist as the scope: coverage-report tooling, Meson and CI support, efficient profile transfer, and coverage for host-run DIF unit tests; done means the relevant items have defined and implemented support.
Written by the indexing model from the issue text.
Assessment
- Domain
- build-system, ci-cd, embedded-iot, testing
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 20/100