lowRISC / lowRISC/opentitan

[rram_ctrl,dv] Check host (tl_host) reads/writes in rram_ctrl scoreboard

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SystemVerilog
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Description

process_tl_access()'s host_ral_name branch is a no-op. Needs a per-region config tracker to predict memory-protection errors and check read data against the RRAM data array.

Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start with process_tl_access() and its host_ral_name branch in the rram_ctrl scoreboard. Trace the existing configuration handling and RRAM data array usage, then define the per-region tracking needed to predict memory-protection errors and compare host read data. Done means host tl_host reads and writes are checked rather than ignored.

Written by the indexing model from the issue text.

Assessment

Domain
testing
Issue type
Feature
Difficulty
4/5
Estimated time
3-5 days
Activity status
Active
Clarity
Mostly clear
Newbie friendliness
48/100

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