lowRISC / lowRISC/opentitan

[CHERIoT] Revocation bitmap and meta SRAM ctrl point to same address space

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#31,073 1 comment 0 reactions 1 assignee View on GitHub

@thommythomaso is already working on this.

Since Aug 20, 2026.

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SystemVerilog
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Description

With the current tooling, both the system port to the revocation bitmap as well as the base address of the meta SRAM controller point to the same address space leading to a duplication of the entries in the address map and the linker script.

The meta SRAM is not directly accessible in the address map as it sits behind the CHERIoT subsystem. We need to adapt `topgen` to resolve this duplicated entry.

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