lowRISC / lowRISC/opentitan

[dma/rtl] Wrong memory range check because of missing register update

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IP:dma
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SystemVerilog
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Description

DMA has the following out of bounds check:
https://github.com/lowRISC/opentitan/blob/73e7b00ad2b9fa2fb21f18acc9094803315b9bef/hw/ip/dma/rtl/dma.sv#L863-L874
DMA updates dst_addr_lo here:
https://github.com/lowRISC/opentitan/blob/73e7b00ad2b9fa2fb21f18acc9094803315b9bef/hw/ip/dma/rtl/dma.sv#L1170-L1203
However, when increment=1 and wrap=0, update_dst_addr_reg is not set and we are not updating the register. Hence, the bounds check does not work correctly.

As a temporary fix, firmware can conduct the range check to make sure that no out of bounds access can happen. However, before we sign off this block we should provide an RTL fix for this.

Thanks to Vishal Bhogade (@vishalbb-git) for reporting this!

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Research direction

Start in hw/ip/dma/rtl/dma.sv at the out-of-bounds check around lines 863-874 and the dst_addr_lo update logic around lines 1170-1203. Trace the increment=1, wrap=0 path and inspect the relevant DMA RTL tests. Done means the bounds check observes the updated destination address and the regression covers this case.

Written by the indexing model from the issue text.

Assessment

Domain
embedded-iot
Issue type
Bug
Difficulty
3/5
Estimated time
1-2 days
Activity status
Quiet
Clarity
Clearly specified
Newbie friendliness
72/100

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