[opentitanlib] Expose transport clock frequencies through the ot_transport JSON5 files.
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- Dominant language
- SystemVerilog
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Description
Description
When #30474 was merged, there was a need for the host to know the main clock frequency of the CW340 device that it was talking to (see here). Since we know this is only a CW340, it is just hard-coded for now. However:
- There could be more FPGA targets in the future, which might have different clock speeds.
- It makes changing the FPGA clocks more difficult (if desired).
In reality, the various clock frequencies that are already defined on the device side in the arch/device_{}.h files should also be available through the ot_transport JSON5 files, like the one here. This should then propagate through to the transport object, and allow users to query the frequency of a given device clock - just like they already can for pin strappings, UARTs, SPIs etc. This should be quite single, as this is just a single integer that needs to be passed through.
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start with sw/host/opentitanlib/src/io/fpga_backdoor.rs and the chipwhisperer/config/opentitan_cw340.json5 transport configuration, then compare the clock definitions in arch/device_{}.h with existing transport metadata such as pin strappings and UARTs. Done means the clock frequencies from each ot_transport JSON5 file propagate into the transport object and can be queried by users.
Written by the indexing model from the issue text.
Assessment
- Tech stack
- json, rust
- Domain
- embedded-iot
- Issue type
- Feature
- Difficulty
- 3/5
- Estimated time
- 1-2 days
- Activity status
- Quiet
- Clarity
- Mostly clear
- Newbie friendliness
- 70/100