lowRISC / lowRISC/opentitan

[CI, FPGA] Move CW310 tests to nightly run only

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SystemVerilog
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Description

### Description

Currently, the FPGA bitstream build is the bottleneck of our CI. In the worst-case scenario (when the cache is missed), a PR builds two bitstreams (CW310 and CW340), which puts a strain on the limited number of available licenses.

I suggest porting all compatible tests to the CW340 tracked by https://github.com/lowRISC/opentitan/issues/23558, and dropping the CW310 tests from the PR pipeline. We can then keep the CW310 as a nightly run to ensure the environment is maintained.

Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start by locating the CI jobs and test entry points for the CW310 and CW340 FPGA environments. Review issue 23558 for the planned CW340 coverage, then verify that compatible tests run on CW340, CW310 is removed from pull-request runs, and CW310 remains covered by a nightly job.

Written by the indexing model from the issue text.

Assessment

Domain
ci-cd, embedded-iot
Issue type
Refactor
Difficulty
4/5
Estimated time
3-5 days
Activity status
Quiet
Clarity
Mostly clear
Newbie friendliness
48/100

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