lowRISC / lowRISC/opentitan

[top_darjeeling] Is there synthesis sdc for top_darjeeling?

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Component:Darjeeling
Dominant language
SystemVerilog
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Description

desc

We found that there is a file "chip_earlgrey_asic.sdc" for synthesis, but not found "chip_darjeeling_asic.sdc".
Is there synthesis sdc for top_darjeeling?

Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start by locating chip_earlgrey_asic.sdc and checking the repository for any darjeeling-specific synthesis constraint file or references to top_darjeeling. The issue does not define a code change; completion would require confirming whether such an SDC exists and documenting or reporting the answer.

Written by the indexing model from the issue text.

Assessment

Domain
build-system, embedded-iot
Issue type
Documentation
Difficulty
2/5
Estimated time
1-3 hours
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
25/100

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