[qemu] Pinmux/pad support

QEMU currently exposes the GPIO block directly via a chardev. The pins can seemingly be influenced by pinmux attributes, but their mappings are not visible.

Specifically, it's not currently possible to write to, for example, "IOR13" and have it go to the correct GPIO. This is necessary for bootstrapping and GPIO tests.

We will need a pinmux chardev that routes to the correct GPIOs and should probably error out if connected to a peripheral like SPI or UART where we don't support bitbanging.

Start by tracing QEMU's existing GPIO chardev and how pinmux attributes affect pin mappings. Define the pinmux chardev behavior for routing names such as IOR13 to the correct GPIO, including the requested error case for SPI or UART connections, then verify it supports bootstrapping and GPIO tests.

Written by the indexing model from the issue text.