RFC: Glitch Filter for I²C SCL and SDA Inputs

### Description

Hi all,

I’d like to propose adding a glitch filter to the I²C IP core to improve noise robustness on the SCL and SDA inputs.
The idea is to place a small N-cycle stability check after the two-stage synchronizer so that short pulses (glitches) are ignored, while valid I²C transitions pass through.

The full draft RFC is here: https://docs.google.com/document/d/19hkUFaqMAJH2dpYH56lC1JZGZ3TkixecQj2qOuO8z58/edit?usp=sharing

I’d welcome feedback and guidance on whether this should be fixed-length or configurable, and any integration concerns.

Best regards,
Sohan Sai

Start by reading the linked RFC and reviewing the I²C IP core’s SCL and SDA input path, especially the two-stage synchronizer. Determine whether the proposed N-cycle stability check should be fixed-length or configurable and identify integration concerns. The issue does not define an implementation target or tests, so completion depends on resolving the design questions first.

Written by the indexing model from the issue text.