lowRISC / lowRISC/opentitan

[otp_ctrl] Dedicated zeroization DAI error bit

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IP:otp_ctrl
Dominant language
SystemVerilog
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Description

Errors during a `ZEROIZE` DAI request result in the same error bits being set
in the `STATUS` register (e.g., `AccessError`) as for the regular `READ`, `WRITE`
or `DIGEST` commands.

Having a dedicated error bit for the `ZEROIZE` command would demarcate errors that
can only occur during a zeroization of a OTP word from the other ones. For example,
for added protection, the DAI could itself check the validity of a zeroized word by
counting the number of set bits and signal an error if the zeroization criterion is not
met (see this [discussion](https://github.com/lowRISC/opentitan/pull/28044#discussion_r2321452250)).

Adding a new error bit to the `STATUS` register has the side-effect of reducing the
maximum number of partitions as their error bits are also held in `STATUS`.
#26746 proposes to separate error and status bits into different registers such
that new error bits can be added more freely.

Contributor guide

Open the contributing guide

Research direction

Start with the otp_ctrl DAI ZEROIZE handling and STATUS register definition. Review the linked discussion and issue #26746 for the register-layout constraints, then verify that ZEROIZE errors are distinguishable from READ, WRITE, and DIGEST errors without overlooking the partition-count impact.

Written by the indexing model from the issue text.

Assessment

Domain
security
Issue type
Feature
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
45/100

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