lowRISC / lowRISC/opentitan

[soc_dbg_ctrl] Design specification checks / updates

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#27,734 1 comment 0 reactions 1 assignee View on GitHub

@Razer6 is already working on this.

Since Jul 28, 2025.

IP:soc_dbg_ctrl
Dominant language
SystemVerilog
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Merged PRs (30d)
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Description

- [ ] SPEC_COMPLETE (D1 item)
Check and fix or confirm that the specification Markdown document of the IP is complete and up to date (90% would suffice for D1, but 100% is required for D2), with all features defined.
This task also includes the NEW_FEATURES and FEATURE_FROZEN D2 items.
- [ ] BLOCK_DIAGRAM (D2 item)
Check and fix or confirm that the block diagram reflects the current design of the IP.
This task also includes the PHYSICAL_MACROS_DEFINED_80 D1 item as well as the PORT_FROZEN and ARCHITECTURE_FROZEN D2 items.
- [ ] DOC_INTERFACE (D2 item)
Check and fix or confirm that all interfaces of the IP that are not autogenerated are documented.
- [ ] DOC_INTEGRATION_GUIDE (D2 item)
Check and fix or confirm that any integration aspects of the IP that are not covered by the comportability specifications are documented.

Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

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