lowRISC / lowRISC/opentitan

[lc_ctrl/dv] Verify `lc_hw_debug_clr_o`

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Component:DV IP:lc_ctrl
Dominant language
SystemVerilog
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Avg merge
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Merged PRs (30d)
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Description

PR #27331 added an output to `lc_ctrl` to clear flops in other modules holding the HW Debug state without a reset.

This needs to be verified in block-level DV.

Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start by reading PR #27331 and the lc_ctrl changes introducing lc_hw_debug_clr_o. Then locate the block-level DV environment for lc_ctrl and determine how verification of clearing HW Debug state in other modules is organized; done means coverage or tests demonstrate the output clears the relevant flops without reset.

Written by the indexing model from the issue text.

Assessment

Domain
embedded-iot, testing-qa
Issue type
Feature
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
25/100

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