[dv] Explore how reset handling can be improved
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@matutem is already working on this.
Since Jun 24, 2025.
Component:DV
IP:all
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Description
Reset handling is in general very flaky in module level DV. `stress_test_all_with_reset` does some form of reset, but this needs to be more generic and dv_base_vseq.sv or cip_base_vseq.sv should actually support it.
Change in reset handling will have implications across the board for DV in OT and a migration plan for individual modules might be needed.
Experiments will be done on AC_RANGE_CHECK to prove some of the concepts
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