[manuf] develop DV test to perform a UJSON string TX operation

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### Description

To facilitate bringup of manufacturing flows in the ATE environment we must provide waveforms (a VCD file) that can perform UJSON string TX operations over the SPI console. Writing a DV test to do so will generate such a waveform. This test should load a SW image that expects to receive a UJSON message over the SPI console and the host (SystemVerilog component) should send send a string. The OTTF SPI console should make use of the of the [putbuf_buffered](https://cs.opensource.google/opentitan/opentitan/+/earlgrey_1.0.0:sw/device/tests/ottf_console_with_gpio_tx_indicator_test.c;l=20) and [console_tx_indicator](https://cs.opensource.google/opentitan/opentitan/+/earlgrey_1.0.0:sw/device/tests/ottf_console_with_gpio_tx_indicator_test.c;l=22) configurations to minimize SPI console activity and maximize packet size.

Start with the referenced sw/device/tests/ottf_console_with_gpio_tx_indicator_test.c file and inspect the putbuf_buffered and console_tx_indicator configurations. Then locate the existing DV test entry point and its SW image setup for SPI console traffic. Done means a test produces a VCD waveform in which the host sends a UJSON string over the SPI console.

Written by the indexing model from the issue text.