[reggen] Allow placing interrupt and alert registers at specific offsets

### Description

Some IPs currently set `no_auto_intr_regs` or `no_auto_alert_regs` to `True` but then still manually add the respective interrupt/alert registers. This is sometimes done to be able to place them at very specific offsets.
However, this creates issues with automatic testing.
To solve this and to avoid the manual placement we should change the IP hjson format to allow us to specify where the CIP-standard alert / interrupt CSRs are placed.

The following IP blocks could benefit from this change:
- rv_timer
- aon_timer
- racl_ctrl
- rv_plic

Review the reggen IP HJSON format and register-generation paths for rv_timer, aon_timer, racl_ctrl, and rv_plic. Define how requested offsets should be represented and ensure the generated CIP-standard alert and interrupt CSRs are placed accordingly, with automatic testing covering the affected blocks.

Written by the indexing model from the issue text.