lowRISC / lowRISC/opentitan

[Multitop, test] Functional Test for All SW Accessible Blocks

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#26,709 0 comments 0 reactions 2 assignees View on GitHub

@Razer6 is already working on this.

Since Mar 24, 2025.

Component:ChipLevelTest
Dominant language
SystemVerilog
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Description

Create a test which functionally exercises all blocks which SW interfaces with.

@andreaskurth Could you please flesh this out with details needed?

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