[multitop,dv] chip_sw_keymgr_dpe_key_derivation
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Component:ChipLevelTest
IP:keymgr_dpe
Priority:P1
- Dominant language
- SystemVerilog
- Stars
- 3.6k
- Forks
- 1.1k
- Avg merge
- 2d 22h
- Merged PRs (30d)
- 141
Description
The DV for this test must be ported from the integrated_dev to master. The device software has already been ported.
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by locating the chip_sw_keymgr_dpe_key_derivation DV test in the integrated_dev and master branches, then compare the existing device-software port with the remaining DV work. Done means the DV test is ported to master and preserves the integrated_dev test coverage and behavior.
Written by the indexing model from the issue text.
Assessment
- Domain
- testing
- Issue type
- Refactor
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 35/100