[top_darjeeling] Enable lint checks for all HW IP blocks
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Component:Darjeeling
- Dominant language
- SystemVerilog
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- Avg merge
- 2d 22h
- Merged PRs (30d)
- 141
Description
- [ ] clkmgr
- [ ] pinmux
- [ ] soc_dbg_ctrl_decode
- [ ] soc_proxy
- [ ] jtag_dtm
- [ ] chip_darjeeling_asic
- [ ] adapter_dmi
- [ ] ac_range_check (new)
- [ ] other new IPs?
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by reviewing the lint setup and the listed HW IP blocks: clkmgr, pinmux, soc_dbg_ctrl_decode, soc_proxy, jtag_dtm, chip_darjeeling_asic, adapter_dmi, and ac_range_check. Determine how lint checks are enabled for each block and whether other new IPs are included; done means all applicable blocks pass the enabled lint checks.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot, testing-qa, tooling
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 35/100