[Multitop, test] chip_sw_power_virus

• Tests should not depend on earlgrey constants. Try removing #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h" and see what doesn't compile.
• Replace any dif__init with dif__init_from_dt to avoid TOP_EARLGREY__BASE_ADDR.
• Add //hw/top:dt to deps to get all device table libraries.
• Use bazel build //hw/top:dt_api_hdr and bazel build //hw/top:dt__hdr to see the autogenerated DT headers. The _src suffix shows the C files.
• Grep for kClockFreq.*. These are top-specific but don't come from a top_earlgrey header. Replace with dt_clock_frequency(...).
• For ISRs: replace peripheral = with dt_plic_id_to_instance_id and compare to the DT instance using dt__instance_id(dt__t).
• Again for ISRs, convert the plic IRQ ID to a block-specific ID with dt__irq_from_plic_id and switch on that.

The test chip_sw_power_virus should run and pass for Ealrgrey and should build for Darjeeling.

Start by locating the chip_sw_power_virus test and its top_earlgrey header use. Remove the top-specific dependencies, use the listed device-table and interrupt helpers, and run the suggested DT header builds. Done means the test runs and passes for Earlgrey and builds for Darjeeling.