lowRISC / lowRISC/opentitan

[Multitop, test] base_rom_e2e_smoke

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Component:ChipLevelTest IP:rom Multitop:Autogen Priority:P2
Dominant language
SystemVerilog
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Description

- Tests should not depend on earlgrey constants. Try removing #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h" and see what doesn't compile.
- Replace any dif_rom_init with dif_rom_init_from_dt to avoid TOP_EARLGREY_rom_BASE_ADDR.
- Add //hw/top:dt to deps to get all device table libraries.
- Use bazel build //hw/top:dt_api_hdr and bazel build //hw/top:dt_rom_hdr to see the autogenerated DT headers. The _src suffix shows the C files.
- Grep for kClockFreq.*. These are top-specific but don't come from a top_earlgrey header. Replace with dt_clock_frequency(...).
- For ISRs: replace peripheral = with dt_plic_id_to_instance_id and compare to the DT instance using dt_rom_instance_id(dt_rom_t).
- Again for ISRs, convert the plic IRQ ID to a block-specific ID with dt_rom_irq_from_plic_id and switch on that.

The test base_rom_e2e_smoke should run and pass for Ealrgrey and should build for Darjeeling.

Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start with the base_rom_e2e_smoke test and remove its top_earlgrey header dependency, then use the listed DT APIs and inspect the autogenerated headers with the provided Bazel commands. Check clock and ISR handling against the issue guidance. Done means the test passes for Earlgrey and builds for Darjeeling.

Written by the indexing model from the issue text.

Assessment

Tech stack
c
Domain
build-system, embedded-iot, testing
Issue type
Refactor
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
30/100

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