Add DV environment for soc_dbg_ctrl
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Nobody has claimed this yet.
Component:DV
- Dominant language
- SystemVerilog
- Stars
- 3.6k
- Forks
- 1.1k
- Avg merge
- 2d 22h
- Merged PRs (30d)
- 141
Description
soc_dbg_ctrl is a new IP and is missing a DV environment. This issue tracks these efforts.
/cc @rswarbrick
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by locating the soc_dbg_ctrl IP and reviewing DV environments for comparable IPs. Identify the expected environment structure and verification scope from those examples; done means soc_dbg_ctrl has a usable DV environment covering the requirements established by the surrounding project.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot, testing-qa
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 35/100