[hmac] Implement a SW reset
- Dominant language
- SystemVerilog
- Stars
- 3.6k
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- Avg merge
- 2d 22h
- Merged PRs (30d)
- 141
Description
With the current RTL implementation, it's not possible to interrupt the current operations abruptly and move back into the initial state of the FSMs. Which means that if there is an alert somewhere or if something went wrong we'll have to perform some dummy operations to be able to restart from a suitable state.
Note: I have also heard that this could also be the case for other blocks.
Note: this could also auto-trigger a `wipe_secret` operation to be sure that nothing sensitive is left.
FYI: @vogelpi, @nasahlpa and @andreaskurth, do you have thoughts about this?
Contributor guide
Research direction
The issue mentions the HMAC RTL implementation and its FSMs, but names no files or tests. Start by locating the HMAC RTL and current FSM reset handling, then clarify the required reset behavior, including whether wipe_secret is in scope. Done criteria are not defined in the issue and need maintainer agreement.
Written by the indexing model from the issue text.
Assessment
- Domain
- cryptography, security
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 20/100