[test-triage] `otbn_sec_cm` failures

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### Hierarchy of regression failure

Block level

### Failure Description

```
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_otbn_0.1/rtl/otbn.sv,1381): (time 50485961 PS) Assertion tb.dut.ErrBitsKnown_A has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_otbn_0.1/rtl/otbn_core.sv,948): (time 50485961 PS) Assertion tb.dut.u_otbn_core.DoneOKnown_A has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_otbn_0.1/rtl/otbn_core.sv,949): (time 50485961 PS) Assertion tb.dut.u_otbn_core.ImemReqOKnown_A has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_otbn_0.1/rtl/otbn_core.sv,950): (time 50485961 PS) Assertion tb.dut.u_otbn_core.ImemAddrOKnown_AKnownEnable has failed
xmsim: *E,ASRTST (/workspace/default/src/lowrisc_ip_otbn_0.1/rtl/otbn_core.sv,960): (time 50485961 PS) Assertion tb.dut.u_otbn_core.ErrBitsKnown_A has failed
```

### Steps to Reproduce

- GitHub Revision: [098010d125](https://github.com/lowrisc/opentitan/tree/098010d125501056429f651ff76da30d109948f4)
- dvsim invocation command to reproduce the failure, inclusive of build and run seeds:
```sh
./util/dvsim/dvsim.py hw/ip/otbn/dv/uvm/otbn_sim_cfg.hjson \
-i otbn_sec_cm \
--build-seed 12185085088694708177096441863424670920996379189869351644310607217057882846251 \
--fixed-seed 62192641707213035652840956947919660257148608463524519747345686541141973512123 \
--waves fsdb
```
- Kokoro build number if applicable

### Tests with similar or related failures

_No response_

Reproduce the failure with the listed dvsim command and revision 098010d125. Start with the assertions in rtl/otbn.sv and rtl/otbn_core.sv at the reported lines, then trace the otbn_sec_cm test to determine why these signals become unknown. Done means the failure cause is identified and the regression passes without the reported assertion failures.

Written by the indexing model from the issue text.