[regtool] ral for single field register is different from multi field register
- Dominant language
- SystemVerilog
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Description
### Description
For single field register ral file contains:
```verilog
.add_hdl_path_slice(
"u_reg.u_.qs",
0, 18, 0, "BkdrRegPathRtl");
```
While for multi fields register it contains:
```verilog
.add_hdl_path_slice(
"u_reg.u__.qs",
0, 11, 0, "BkdrRegPathRtl");
```
The following is missing for single field register:
```
_
```
This cause automation issues.
Please add the missing part to single field registers.
Contributor guide
Research direction
Start by locating the regtool logic that generates RAL files, then compare the single-field and multi-field register paths shown in the issue. Check existing generation tests or generated fixtures if available. Done means single-field register paths include the field-name suffix consistently with multi-field registers and automation no longer sees different formats.
Written by the indexing model from the issue text.
Assessment
- Domain
- tooling
- Issue type
- Bug
- Difficulty
- 3/5
- Estimated time
- 1-2 days
- Activity status
- Stale
- Clarity
- Clearly specified
- Newbie friendliness
- 45/100