[prim_xilinx_pad_wrapper] Implement physical input disable using I/O buffers

`prim_xilinx_pad_wrapper` supports input disabling (since PR #23042) but currently implements it with a logic assignment. For bidirectional pads, there is an [`IOBUF_DCIEN` primitive](https://docs.amd.com/r/en-US/ug953-vivado-7series-libraries/IOBUF_DCIEN) for pads in high-performance banks and an [`IOBUF_INTERMDISABLE` primitive](https://docs.amd.com/r/en-US/ug953-vivado-7series-libraries/IOBUF_INTERMDISABLE) for pads in high-range banks, which both have an `IBUFDISABLE` input. To instantiate the correct primitive, `prim_xilinx_pad_wrapper` needs to know which bank the pad is connected to, and currently this information is not available to that module.

To resolve this issue, the information about the I/O bank of a pad needs to be passed to `prim_xilinx_pad_wrapper` (and for that, the information probably needs to move from SDC files to an Hjson), and then `prim_xilinx_pad_wrapper` needs to instantiate the correct primitive based on the I/O bank parameter.

Before doing this, we should check that the primitives really support the IOSTANDARDs we use (LVCMOS18 and LVCMOS33), because for input-only pads, there is an `IBUF_IBUFDISABLE` primitive, which does *not* support those IOSTANDARDs. Neither neither [UG953](https://docs.amd.com/r/en-US/ug953-vivado-7series-libraries/) nor [UG471](https://docs.amd.com/v/u/en-US/ug471_7Series_SelectIO) document this limitation, but when one instantiates `IBUF_IBUFDISABLE` without setting its IOSTANDARD parameter, Vivado throws the following error:
```
ibuf_IOSTANDARD_not_compatible_with_IBUFDISABLE: u_padring/gen_dio_pads[11].u_dio_pad/gen_xilinx.u_impl_xilinx/gen_input_only.u_ibuf is using input pin IBUFDISABLE which is not supported for IOSTANDARDs LVCMOS12,LVCMOS15,LVCMOS18,LVCMOS25,LVCMOS33,MOBILE_DDR,DIFF_MOBILE_DDR,LVDCI_18,LVDCI_15,LVDCI_DV2_18,LVDCI_DV2_15,PCI33_3,LVTTL
```

Note that this issue is specific to 7 Series devices, whereas issue #23095 is specific to UltraScale devices.

Start by reading prim_xilinx_pad_wrapper and tracing how pad information currently flows from the SDC files. Check the AMD UG953 and UG471 documentation for IOBUF_DCIEN, IOBUF_INTERMDISABLE, and input-only buffer compatibility with LVCMOS18 and LVCMOS33. Done means the pad bank reaches the wrapper, the correct 7 Series primitive is selected, and the supported IOSTANDARDs are validated.

Written by the indexing model from the issue text.