lowRISC / lowRISC/opentitan

[ROM] The Retention Sram initialization does not follow the steps in the manual.

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SW:ROM SW:ROM_EXT
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Description

### Description

Hello, looking in the retention SRAM initialization process in the rom I can see that the initialization just calls the retention_sram_init function.

https://github.com/lowRISC/opentitan/blob/a6780fbdcfd7eec55030ccad3b63195918d17650/sw/device/silicon_creator/rom/rom.c#L181

https://github.com/lowRISC/opentitan/blob/master/sw/device/silicon_creator/lib/drivers/retention_sram.c#L3

That initializes the retention sram but does not get a scrambling key, and although the scrambling function that does the initialization is present as well, just below it, it is not used. This would pose some problems to the silicon owner since that means he either has to live with the unscrambled ram ( well, here my understanding is fuzzy but I believe that technically, it is scrambled, but with a default key, without randomness seeded), or reinit the retention ram, and that would mean he has to backup the creator section and then restore it after init in order to avoid losing the data.

If the intention is for the silicon creator ROM to init the sram, then likely the intention would be a scrambled and fully validated key to be present. I would have expected the init called to follow the process outlined in the documentation:

https://opentitan.org/book/hw/ip/sram_ctrl/doc/programmers_guide.html

Also, it seems the intention is that the retention sram to store data to be communicated to the user SW, but certain pieces of data don't really make sense to be stored there. For example, the reset reason could be located in normal RAM as well, since it changes across resets, and the property or rram to keep data across resets does not make sense here.

I see in the existing code the intention for the creator ROM to use half of the rram and the device owner to use the other half, but I feel that should be documented in order to avoid confusion. I'm also not sure what the threat model is when crossing creator ROM execution boundries and if you want to still trust the RRAM data after the user code has executed.

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Research direction

Start with sw/device/silicon_creator/rom/rom.c and sw/device/silicon_creator/lib/drivers/retention_sram.c, then compare the initialization flow with the SRAM controller programmers guide. Resolve whether ROM must obtain and validate a scrambling key, how creator and owner regions are divided, and what data remains trusted across execution boundaries. Done requires an agreed implementation or documentation decision for these behaviors.

Written by the indexing model from the issue text.

Assessment

Tech stack
c
Domain
embedded-iot, security
Issue type
Bug
Difficulty
5/5
Estimated time
Over a week
Activity status
Stale
Clarity
Needs clarification
Newbie friendliness
25/100

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