[prodc-integration] Normal Sleep Power Consumption High

Description

We are noticing that the power draw while the chip is in normal sleep is around 13mW (3.95mA @ 3.3V). We are hoping to target the 6 - 8 mW range or better for normal sleep.

By normal sleep, I mean a sleep that retains SRAM contents and will wake up and start executing code from where it left off. Normal sleep is like a deeper WFI where there is no pending interrupt to process. We still want to wake up from normal sleep in a reasonable amount of time to handle incoming TPM communication from the AP (either on I2C or SPI bus).

What we are doing for normal sleep:

• Following programmers guide to enter low power mode
  • We configure the control to have only MAIN_PD_N set (this gives us 3.95mA draw)
  • If we set MAIN_PD_N + USB_CLK_EN_LP + IO_CLK_EN + CORE_CLK_EN we get 7.8mA as a point of reference.
    • What do we lose by allowing USB_CLK_EN_LP, IO_CLK, and CORE_CLK to shutdown during sleep?

What else can we try to get the power consumption of normal sleep down to the 6-8 mW range or better?

For another data point: "deep sleep," i.e. sleep that must resume execution from ROM/ROM_EXT, power consumption looks good. It is around 600uW (0.20mA @ 3.33V).