lowRISC / lowRISC/opentitan

[ROM] Enable Schmitt trigger in pads (via pinmux) where beneficial

Open
#22,098 8 comments 0 reactions 0 assignees View on GitHub

Nobody has claimed this yet.

IP:pinmux SW:ROM Triage Priority Type:FutureRelease
Dominant language
SystemVerilog
Stars
3.6k
Forks
1.1k
Avg merge
2d 22h
Merged PRs (30d)
141

Description

Earlgrey's pads feature a [Schmitt trigger](https://en.wikipedia.org/wiki/Schmitt_trigger), which can be enabled per [DIO](https://opentitan.org/book/hw/ip/pinmux/doc/registers.html#dio_pad_attr--schmitt_en) and [MIO](https://opentitan.org/book/hw/ip/pinmux/doc/registers.html#mio_pad_attr--schmitt_en) in pinmux and which can improve signal integrity for certain use cases / protocols.

We should go through our ROM code and check
- which DIOs and MIOs ROM uses
- for which DIOs and MIOs ROM locks the `PAD_ATTR` register (by setting the corresponding `REGWEN`)

and investigate if any of the uses / locks would benefit from having Schmitt trigger enabled. (One example that was mentioned might be SPI Clock.) Where it is beneficial, we should enable the Schmitt trigger.

We should check the timing tables in the datasheets of the relevant target devices and compare them to the characteristics of the Schmitt trigger in Earlgrey before we commit to this change. If the FPGA pads feature a comparable Schmitt trigger (to be checked), we should additionally test this with the relevant target devices connected to Earlgrey on an FPGA.

For DIOs and MIOs not used or locked by ROM, we can later enable the Schmitt trigger in mutable code if we find that the need arises.

Contributor guide

Open the contributing guide

First steps

  1. Read the whole issue, then the project's contributing guide.
  2. Comment on the issue to say you are picking it up — it saves two people doing the same work.
  3. Fork the repository and make your change on a branch.
  4. Open a pull request that references the issue number.

Research direction

Start by inventorying the ROM code's DIOs and MIOs, including uses of the pinmux DIO_PAD_ATTR and MIO_PAD_ATTR registers and their REGWEN locks. Compare relevant target-device timing tables with Earlgrey's Schmitt-trigger characteristics, then document which pads should be enabled and test on FPGA with connected target devices where applicable.

Written by the indexing model from the issue text.

Assessment

Domain
embedded-iot
Issue type
Feature
Difficulty
5/5
Estimated time
Over a week
Activity status
Active
Clarity
Mostly clear
Newbie friendliness
45/100

Get new issues in your inbox

A short digest of beginner-friendly GitHub issues.