[i2c,rtl] Compress ACQ FIFO entries
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Description
Description
This issue is based on a TODO that I added in this pull request: https://github.com/lowRISC/opentitan/pull/21857
Encode i2c_acq_byte_id_e more efficiently in the ACQ FIFO. Each entry in the ACQ FIFO does not need to contain both an 8 bit data field and a 3 bit identifier. We should have the ACQ FIFO be 9 bits wide where the MSB indicates whether it is a data byte or a control byte. This way we can add more values to this enum without having to widen the ACQ FIFO width.
The affected file: https://github.com/lowRISC/opentitan/blob/master/hw/ip/i2c/rtl/i2c_pkg.sv
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start with hw/ip/i2c/rtl/i2c_pkg.sv and inspect the ACQ FIFO entry definition and its uses. Confirm that entries use 9 bits, with the MSB distinguishing data from control bytes, and verify that the existing identifier values remain representable without widening the FIFO.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot
- Issue type
- Refactor
- Difficulty
- 3/5
- Estimated time
- 1-2 days
- Activity status
- Stale
- Clarity
- Clearly specified
- Newbie friendliness
- 55/100