[chip-test] chip_sw_lc_ctrl_volatile_raw_unlock

Nobody has claimed this yet.

### Test point name

chip_sw_lc_ctrl_volatile_raw_unlock

### Host side component

Unknown

### OpenTitanTool infrastructure implemented

Unknown

### Silicon Validation (SiVal)

Unkown

### Emulation Targets

- [ ] None
- [X] CW310
- [ ] Hyperdebug + CW310

### Contact person

_No response_

### Checklist

Please fill out this checklist as items are completed. Link to PRs and issues as appropriate.
- [ ] Check if existing test covers most or all of this testpoint (if so, either extend said test to cover all points, or skip the next 3 checkboxes)
- [ ] Device-side (C) component developed
- [ ] Bazel build rules developed
- [ ] Host-side component developed
- [ ] HJSON test plan updated with test name (so it shows up in the dashboard)
- [ ] Test added to dvsim nightly regression (and passing at time of checking)
- [ ] For SiVal test cases, test is running relevant FPGA or silicon regression

Start by checking whether an existing test already covers the chip_sw_lc_ctrl_volatile_raw_unlock test point for the CW310 target. Use the checklist to identify the required device-side, Bazel, host-side, HJSON, and regression work; the issue is done when the applicable items are completed and the test passes in the relevant regression.

Written by the indexing model from the issue text.