lowRISC / lowRISC/opentitan

[util/tlgen] Splitting tlgen into two parts

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#203 0 comments 0 reactions 1 assignee View on GitHub

@eunchan is already working on this.

Since Sep 18, 2019.

Component:Tooling Earlgrey-PROD Triaged Help Wanted Priority:P3 Type:Enhancement Type:FutureRelease
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Description

Comment in #143 :
> Current approach looks good in #152 . When I designed tlgen tool, I felt it is quite hard to configure internal sockets. or async fifos. .hjson just defines host ports and device ports. internal fabric is created by the tool. How should we fine-tune the internal fabric ? For instance, we could put the fifo depth in front of the socket_1n, or, combine the common depth and put it in front of the device port. This kind of fine-tune isn't possible in current tlgen.
>
> So is pipeline. The pipeline only affects first meet point of the host (if host has pipeline). But it could be async, socket_1n, or could be socket_m1 depends on the internal fabric implementation.
>
> One rough Idea is, splitting tlgen into two parts. First script just generates final interconnect hjson including all the necessary TL-UL components (async fifo, sockets) and their default value of the parameters. And let the user fine-tune the parameters if needed. Then second part is to read the final hjson and generates the crossbar.
>
> The first script should be smart enough to amend new port or component to the existing generated hjson file but keeps the previous components' parameters.

Suggestion to the tlgen is to have two separate parts and let users to configure the detailed fifo depth after the interconnect is fabricated.

1. First part of tlgen creates complete interconnect and dumps into the hjson file. This hjson file has all the configurable fields and internal components (async, sockets).
2. Let users modify the configurable fields and call tlgen again to create final RTL.

First part should be smart enough to read (if exists) the generated .hjson and amend to it if the # of host and # of devices are changed. For instance, if one more host is added from previous design and connects to the same devices, the final interconnect should have configurations same with additional socket_1n and increased host ports in the socket_m1.

This issue isn't targeted for 0.5 but for beyond.

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