[sim_dv,dpi] Connect opentitanlib to vcs and xcelium
@matutem is already working on this.
Since Oct 27, 2023.
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- SystemVerilog
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Description
### Description
Enabling opentitanlib to run against commercial simulators has a few important benefits:
- It can avoid custom top_level vseqs for a large number of simulation tests
- This means more tests can be run on either sim_dv or fpga, reducing the development load
- There is a number of tests that cannot be run from opentitanlib, like those that inject errors or need very precise timing
- It can enable running tests that fail against the hardware with little effort
This connection can be done leveraging the existing verilator transport, and the existing DPI it uses. There will be a need to customize some of the code, like the SV side of the DPI, and the way the transport starts verilator.
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Assessment
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