[rom,rom_ext] Add instruction count checks for OTBN operations.

See https://github.com/lowRISC/opentitan/pull/20011#discussion_r1357822273

OTBN's instruction count register is a useful protection against fault attacks, especially for constant-time code. In the OTBN boot-services code, we should check the instruction counts against expected values. This may require expanding `hw/ip/otbn/util/get_instruction_count_range.py` to accept certain fixed-constant registers, so we can set the mode. For ECDSA keypair generation and signatures, the instruction count should never vary. For RSA signature verification, it will need to be a range.

This can follow the model of `mod_exp_otbn` from ROM: https://github.com/lowRISC/opentitan/blob/619ce83526bd38018d6b5c2972d07fa6e1dcef65/sw/device/silicon_creator/lib/sigverify/mod_exp_otbn.c#L88-L97