[chip-test] chip_sw_usbdev_sof

Test point name

chip_sw_usbdev_sof

Host side component

None

OpenTitanTool infrastructure implemented

None

Silicon Validation (SiVal)

Yes

Emulation Targets

• None
• CW310
• Hyperdebug + CW310

Contact person

alees24

Checklist

Please fill out this checklist as items are completed. Link to PRs and issues as appropriate.

• Check if existing test covers most or all of this testpoint (if so, either extend said test to cover all points, or skip the next 3 checkboxes)
• Device-side (C) component developed
• Bazel build rules developed
• Host-side component developed
• HJSON test plan updated with test name (so it shows up in the dashboard)
• Test added to dvsim nightly regression (and passing at time of checking)
• For SiVal test cases, test is running relevant FPGA or silicon regression

estimate 1

Start by checking whether an existing test already covers the chip_sw_usbdev_sof test point. Then work through the checklist for the device-side C component, Bazel rules, HJSON test plan, and CW310 or Hyperdebug regression coverage. Done means the applicable checklist items are completed and linked PRs or issues are recorded.