lowRISC / lowRISC/opentitan

[rv_dm] V2.5 TODOs

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#18,395 5 comments 0 reactions 2 assignees View on GitHub

@rswarbrick is already working on this.

Since Mar 16, 2024.

Component:DV Earlgrey-PROD Candidate IP:rv_dm
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Description

### Description

TODOs defined in [RV_DM Effort Scoping](https://docs.google.com/document/d/1TzNguhYeWfP1IoMExbJQKGM_-zFVyxSrt9kdHS-QRhc/edit#)

TODOs in the code
hw/ip/rv_dm/dv/rv_dm_sim_cfg.hjson
48: // TODO: Remove these overrides here and the original ones in common_sim_cfg.hjson. None of
71: // TODO: Update cover_reg_top hier file to accommodate JTAG DTM, DM CSRs and debug mem TL

hw/ip/rv_dm/dv/env/rv_dm_if.sv
23: // TODO: add clocking blocks.

hw/ip/rv_dm/dv/env/rv_dm_scoreboard.sv
39: // TODO: remove once support alert checking
120: // TODO: effect of lc_hw_debug_en.
123: // TODO: predict error DMI access.
129: // TODO: what should happen here?
136: do_read_check = 1'b0; // TODO.
215: // TODO: deal with item not being ok.

hw/ip/rv_dm/dv/sva/rv_dm_bind.sv
41: // TODO: What about 'rv_dm_mem_csr_assert_fpv?

hw/ip/rv_dm/dv/env/seq_lib/rv_dm_base_vseq.sv
54: // TODO: Randomize the contents of the debug ROM & the program buffer once out of reset.
103: // TODO: Improve this later.
124: // TODO: sba_tl_device_seq_disable_tlul_assert_host_sba_resp_svas();

hw/ip/rv_dm/dv/env/rv_dm_env.core
16: # TODO: we only depend on dm_pkg, which should be separated into its own core file.

hw/ip/rv_dm/dv/env/rv_dm_env_cfg.sv
66: jtag_dmi_ral.hartinfo.dataaccess.set_reset(1); // TODO: verify this!
67: jtag_dmi_ral.hartinfo.nscratch.set_reset(2); // TODO: verify this!
87: // TODO: Enable backdoor writes later.
109: // TODO: Change these to access policy.
148: // TODO: This should be an access policy change.

hw/ip/rv_dm/dv/env/seq_lib/rv_dm_sba_tl_access_vseq_lib.sv
68: // TODO: Randomize these controls every num_times iteration.
94: // TODO: Fix and invoke sba_tl_device_seq_disable_tlul_assert_host_sba_resp_svas() instead.
131: // TODO: Verify alert fired.

hw/ip/rv_dm/data/rv_dm.hjson
212: desc: "TODO: No description provided in the spec.",
225: desc: "TODO: No description provided in the spec."
234: tags: [// TODO: It is unclear how to predict these values.
241: desc: "TODO: No description provided in the spec."
255: desc: "TODO: No description provided in the spec."
264: tags: [// TODO: Write-read-check will work after "activating" the debug module via JTAG.
272: desc: "TODO: No description provided in the spec."

hw/ip/rv_dm/data/rv_dm_testplan.hjson
6: // TODO: remove the common testplans if not applicable
155: tests: [] // TODO(#15670)
169: tests: [] // TODO(#17033)
185: tests: [] // TODO(#17034)
197: tests: [] // TODO(#17035)
233: sbbusyerror asserts. This is achieved by setting a large TL response delay (TODO).
279: tests: [] // TODO(#15667)
297: tests: [] // TODO(#15668)
321: tests: [] // TODO(#15666)
335: tests: [] // TODO(#17036)
345: tests: [] // TODO(#17032)

hw/vendor/pulp_riscv_dbg/src/dmi_cdc.sv
53: // TODO: Make it clean for synthesis.

hw/vendor/pulp_riscv_dbg/src/dm_csrs.sv
230: // TODO(zarubaf) things need to change here if we implement the array mask
531: // TODO(zarubaf) we currently do not implement the hartarry mask

All DD TODOs seem to be captured in issues or waived for D2.5.
Testplan-related DV TODOs are captured in issues, but there are quite many other DV TODOs remaining
→ effort captured in V2.5 checklist.

Estimate 1d

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