lowRISC / lowRISC/opentitan

[dv] Refactor mem_bkdr_util

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Component:DV Earlgrey-PROD Triaged IP:otp_ctrl IP:sram_ctrl Priority:P3 Type:FutureRelease
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SystemVerilog
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Description

As @sriyerg [suggested](https://github.com/lowRISC/opentitan/pull/16878#discussion_r1051110782), it's better to implement those helper files (mem_bkdr_util__rom/flash/otp/sram) as derived classes such as otp_bkdr_util, flash_bkdr_util etc.

Right now, they are all included in the same class `mem_bkdr_util`, but for example, otp doesn't need the scramble function of sram, likewise to other mem blocks.

It may take a while to refactor it since this class has been widely used in 4 blocks and chip-level as well as close source repo.
Besides making the class structure better, I don't see it has other immediate benefit. Hence, it sounds a P3/P4 issue.

Contributor guide

Open the contributing guide

Research direction

Start by reading mem_bkdr_util and the helper files mem_bkdr_util__rom/flash/otp/sram, then trace their use across the four memory blocks and chip-level code. Refactor the helpers into derived classes such as otp_bkdr_util and flash_bkdr_util, update affected usages, and verify that each memory block retains only the relevant behavior.

Written by the indexing model from the issue text.

Assessment

Domain
embedded-iot
Issue type
Refactor
Difficulty
4/5
Estimated time
3-5 days
Activity status
Stale
Clarity
Mostly clear
Newbie friendliness
35/100

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