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Earlgrey-PROD Triaged
- Dominant language
- SystemVerilog
- Stars
- 3.6k
- Forks
- 1.1k
- Avg merge
- 2d 22h
- Merged PRs (30d)
- 141
Description
It‘s a nice project to study uvm. I'm confused about scoreboard only read registers do check mirror with dut value. Why we don't check register vaule in both write and read time ?
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
No file, test, or verification entry point is named. Start by locating the UVM scoreboard and its register-checking logic, then review how write and read transactions are handled; confirm the intended behavior with maintainers before defining what a completed change would require.
Written by the indexing model from the issue text.
Assessment
- Domain
- testing-qa
- Issue type
- Feature
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 15/100