lowRISC / lowRISC/opentitan

Test idempotency of bitstream splicing with INIT_XX strings

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#16,278 2 comments 0 reactions 1 assignee Claimed by @dmcardle View on GitHub
Component:FPGA SW:Build System Type:Task
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Description

Problems:

* ROM and OTP splicing is kind of fragile. If it stopped working due to some implementation detail (e.g. the BRAM type for OTP changed), we would only notice because e2e tests fail, and it would take some effort to figure out what's going on.
* Currently, updatemem writes *tons* of lines to stdout, roughly 100k lines. The information is mostly useless unless you're actively working on splicing, and it buries other information in CI logs.

I propose that we automatically compare the INIT_XX strings printed by `updatemem` with the Vivado-generated strings (printed by [vivado_hook_write_bitstream_pre.tcl](https://cs.opensource.google/opentitan/opentitan/+/master:hw/top_earlgrey/util/vivado_hook_write_bitstream_pre.tcl;l=177;drc=d9a65f685a8729c626e836b53115c48f54115998)) as a rough idempotency check. This should be pretty easy to implement and cheap to compute.

* [ ] Before getting too deep, we should try comparing the original and spliced bitstreams byte-for-byte. If they match, I suppose we can skip the INIT_XX comparisons.
* [ ] Capture debug output from updatemem in a file, rather than printing to stdout (See [//rules/splice.bzl](https://cs.opensource.google/opentitan/opentitan/+/master:rules/splice.bzl;l=39;drc=f8fe29fc03da03d062c66bccdf1ccb97df1e0ed0)).
* [ ] Expose Vivado-generated `{rom,otp}_init_strings.txt` as Bazel targets in //hw/bitstream/vivado.
* [ ] Define tests in //hw/bitstream/vivado that check that the INIT_XX strings match. We'll need one test for OTP splicing and one for ROM splicing.

Future work:
* #15552

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