[tlul] Consider refactoring tlul_adapter_reg
Open
Component:RTL
Earlgrey-PROD Triaged
IP:tlul
Priority:P3
Type:Cleanup
Type:FutureRelease
- Dominant language
- SystemVerilog
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Description
If we decide to refactor `tlul_adapter_sram` as part of #7462, we should probably also refactor other related modules such as `tlul_adapter_reg`, and align them.
See also this discussion here: https://github.com/lowRISC/opentitan/pull/15737#pullrequestreview-1160824397
CC @tjaychen
Contributor guide
Research direction
Start by reading issue #7462 and the referenced discussion in pull request #15737, then compare the related tlul_adapter_sram and tlul_adapter_reg modules. The scope depends on the outcome of that refactor discussion; done would mean an agreed and implemented alignment for tlul_adapter_reg.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot
- Issue type
- Refactor
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 20/100