[otbn,dv] Model mismatch for URND in LOCKED state
Open
Nobody has claimed this yet.
Component:DV
Earlgrey-PROD Candidate
IP:otbn
Priority:P3
Type:Enhancement
- Dominant language
- SystemVerilog
- Stars
- 3.6k
- Forks
- 1.1k
- Avg merge
- 2d 22h
- Merged PRs (30d)
- 141
Description
Injecting fatal errors that causes immediate locking behaviour causes mismatches between model and RTL. In the case of a fatal error causing immediate locking, model drops URND request while RTL continues to operate regardless of the state of the controller. Ideally, model should match RTL even in LOCKED state.
estimate 4
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
No file or test is named. Start by locating the OTBN model and RTL paths that handle URND requests and controller LOCKED state, then reproduce the fatal-error injection mismatch. Done means the model and RTL agree on URND behavior while LOCKED, with the relevant design-verification checks passing.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot, security, testing-qa
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 32/100