prim_pulse_sync.sv functional issues
@andreaskurth is already working on this.
Since Sep 7, 2026.
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Description
The current implementation of the prim_pulse_sync.sv present 2 functional issues
* The source and dest resets are not effecting eachother and if only one is applied, the toggle state is not initilized which creats a wrong pulse. This issue was detected in the RNG logic which has 2 clocks system, RNG (SYS) and RCLK (TLUL).
* When the cell is handling a pulse and a new one is introduced an ASSERT is issued, if enabled. The new pulse is not blocked and breaks the first puls function. The ASSERT will Error if enabled by after synthesis it will not! Blocking and busy indication is needed to make sure the cell function is not broken.
An alternative cell, ast_pulse_sync.sv was added to the AST to address the above issues.
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