[all] split cm label between bus integrity and WE error check
Open
Component:RTL
IP:prim
Priority:P3
Type:FutureRelease
Type:Task
- Dominant language
- SystemVerilog
- Stars
- 3.6k
- Forks
- 1.1k
- Avg merge
- 2d 22h
- Merged PRs (30d)
- 141
Description
At the moment bus integrity and WE error check uses the same error and the same CM label.
Long term, it would be best to split these out separately.
Contributor guide
Research direction
Start by locating the implementation of the shared error and CM label used by bus integrity and the WE error check. Determine the intended separate labels and error paths; done means each check has its own error and CM label, with relevant verification updated.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot, security
- Issue type
- Refactor
- Difficulty
- 5/5
- Estimated time
- Over a week
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100