[prim] Packer empty signal
Open
Nobody has claimed this yet.
Component:RTL
Earlgrey-PROD Triaged
IP:hmac
IP:prim
Priority:P2
Type:Cleanup
Type:FutureRelease
- Dominant language
- SystemVerilog
- Stars
- 3.6k
- Forks
- 1.1k
- Avg merge
- 2d 22h
- Merged PRs (30d)
- 141
Description
prim_packer does not have indicators out for the empty status. If partial bits are stored in the `prim_packer`, it cannot be known from outside.
This results in HMAC to rely on packer `rvalid` signal rather than empty signal.
Contributor guide
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by inspecting the prim_packer interface and its connection to HMAC, focusing on how partial bits are represented and how rvalid is used. Define the missing externally visible empty-status indication and verify that HMAC can distinguish an empty packer from one holding partial bits.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot, security
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Mostly clear
- Newbie friendliness
- 35/100