lowRISC / lowRISC/opentitan

[spi_device] Tagging for Upload Command/Address FIFOs and Payload Buffer

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#12,439 9 comments 0 reactions 1 assignee View on GitHub

@a-will is already working on this.

Since Jan 12, 2024.

Component:RTL Earlgrey-PROD Candidate IP:spi_device Priority:P3 Type:Enhancement
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SystemVerilog
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Description

Currently, address fifo and the payload do not have any information that SW is able to figure out which command these address and/or payload belong to.

If the host system follows the protocol correctly, it is easy for SW to get. For example, SW can assume that the block erase will always have address field but not payload buffer.

However, if the host system does not follow the protocol, or the SPI is prone to error, it may have chances to receive incomplete commands or redundant data at the end of a SPI transactions. In this case, the matches between the address and command FIFOs will be broken.

The suggestion is to have tags to figure out the connections among the FIFOs and buffer.
Easy (from the HW design point of view) revision is to have tag field in command/ address/ and payload that SW can read out.

Cleaner revision is, to update the address to the index same as the command fifo is written. Payload to have tag CSR pointing to the correct cmd FIFO entry. This requires the overhaul of the FIFOs and additional CSR for payload buffer.

BREAKING CHANGE: This will revise the way how to get the address and payload for the upload commands. SW and DV needs to be revised too.

CC: @alphan

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