[dv] bi-direction assignment issue in Xcelium
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- SystemVerilog
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Description
This issue is created to follow up with Cadence. A workaround has been found.
We use the following way to drive bi-direction port. It works for VCS, but not for Xcelium.
When `cio_sd_en_o[0]` (output enable) is set, `spi_if.sio` should be driven by DUT, otherwise, driver can drive it.
In this case, `cio_sd_en_o[0]` is assigned to 0 after time 0. Only driver may drive it.
```
assign spi_if.sio[0] = (cio_sd_en_o[0]) ? cio_sd_o[0] : 1'bz;
assign sd_in[0] = spi_if.sio[0];
```
Here is the failing waves. When csb=0, driver drives sio[0] with 0 or 1, and the places that show Z should be zero.

Then, I did some experiments, and found `cio_sd_en_o[0]` may be the root cause, while this single is set to 0 at time 0.
I modified as follows and it works.
```
wire A_ENABLE = cio_sd_en_o[0];
assign spi_if.sio[0] = (A_ENABLE) ? cio_sd_o[0] : 1'bz;
assign sd_in[0] = spi_if.sio[0];
```
This is the expected waves. There is no more Z when csb is low.

This case can be reproduce by downloading the PR #10831 and run the command as follows.
> cd $REPO_PATH
> util/dvsim/dvsim.py hw/ip/spi_device/dv/spi_device_sim_cfg.hjson -i spi_device_smoke -s 1 -t xcelium
Related to #10799
> estimate 8
> remaining 2023-03-23 8
Contributor guide
Research direction
Start by downloading PR #10831 and running util/dvsim/dvsim.py hw/ip/spi_device/dv/spi_device_sim_cfg.hjson -i spi_device_smoke -s 1 -t xcelium. Inspect the bi-directional spi_if.sio assignment and compare the Xcelium waves with VCS; the issue reports a workaround and says the case needs follow-up with Cadence.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot, testing-qa
- Issue type
- Bug
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Stale
- Clarity
- Needs clarification
- Newbie friendliness
- 30/100