[dv/cip_env_cfg] reduce the flag has_shadowed_regs
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Component:DV
Earlgrey-PROD Candidate
Milestone:V3
Priority:P2
Type:Enhancement
- Dominant language
- SystemVerilog
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Description
Detailed discussion see PR: https://github.com/lowRISC/opentitan/pull/10528#discussion_r797169804
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