[sw] Add 64-bit value support to SW-DV log
Nobody has claimed this yet.
- Dominant language
- SystemVerilog
- Stars
- 38
- Forks
- 21
- Avg merge
- 2d 23h
- Merged PRs (30d)
- 14
Description
Follow-up from PR #600.
`dv_log` args are currently limited to 32-bit values because the DV monitor consumes 32-bit beats — a 64-bit value would be truncated with today's implementation (https://github.com/lowRISC/mocha/pull/600#discussion_r3586377482).
Track widening the arg path (log write side + DV monitor beat handling) so callers are not restricted to 32-bit args.
Related: this same 32-bit limitation means `dv_log_write` cannot log a full 128-bit CHERI capability today — only its address via %x/%p (https://github.com/lowRISC/mocha/pull/600#discussion_r3588879896). Widening the arg path here would also unblock full capability logging.
Contributor guide
No contributing guide indexed for this repository
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start by tracing the dv_log argument path from the log write side through the DV monitor, using PR #600 and its discussion as context for the current 32-bit limitation. Done means 64-bit values are no longer truncated and the widened path also supports full capability logging rather than only the address.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot, security
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Quiet
- Clarity
- Mostly clear
- Newbie friendliness
- 48/100