PLIC DV - Top-level priority-arbitration test

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Implement `chip_rv_plic_priority` (`rv_plic_priority_test` / `rv_plic_priority_test_cheri`, V2, placeholder registered).

SW configures distinct priorities for several interrupt sources (for example UART, SPI device, GPIO, mailbox) and a non-zero threshold, then forces all of them simultaneously. The test confirms that only the highest-priority source above the threshold is delivered first, and that after each claim/complete the next-highest follows in strict priority order. The sequence is then repeated with the priority assignments rotated, to confirm the ordering is driven by the configured priority values and not by the interrupt ID.

Start with the chip_rv_plic_priority entry point and its rv_plic_priority_test and rv_plic_priority_test_cheri variants; no source file or test command is named. The test is done when both variants verify threshold filtering, strict configured-priority ordering across claim/complete cycles, and the rotated-priority sequence.

Written by the indexing model from the issue text.