[rtl,dv] Route KMAC interrupt to the PLIC (+ chip_kmac_irq)
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- Dominant language
- SystemVerilog
- Stars
- 38
- Forks
- 21
- Avg merge
- 2d 23h
- Merged PRs (30d)
- 14
Description
KMAC's interrupt outputs (`intr_kmac_done_o`, `intr_fifo_empty_o`, `intr_kmac_err_o`) are left unconnected in `hw/top_chip/rtl/top_chip_system.sv`, and KMAC is absent from the PLIC `intr_vector` (free slots exist at [3:0] and [30:12]). As a result the `chip_kmac_irq` testpoint has no interrupt path to test.
Work:
- RTL: route KMAC's interrupt into the PLIC `intr_vector` (allocate a free slot).
- DV: implement `chip_kmac_irq` (`kmac_irq_test` / `kmac_irq_test_cheri`, V2) - a full PLIC claim/complete cycle for the KMAC done and FIFO-empty interrupts.
Blocked until the RTL routing lands.
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First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
Start in hw/top_chip/rtl/top_chip_system.sv, where the KMAC interrupt outputs are unconnected and absent from the PLIC intr_vector. Route the interrupts into a free slot, then implement the chip_kmac_irq testpoint through kmac_irq_test / kmac_irq_test_cheri (V2). Done means a full PLIC claim/complete cycle covers the KMAC done and FIFO-empty interrupts.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot, testing
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Quiet
- Clarity
- Mostly clear
- Newbie friendliness
- 48/100