AXI crossbar - Block-level DV for V1
Open
Nobody has claimed this yet.
- Dominant language
- SystemVerilog
- Stars
- 38
- Forks
- 21
- Avg merge
- 2d 23h
- Merged PRs (30d)
- 14
Description
This issue has no description.
Contributor guide
No contributing guide indexed for this repository
First steps
- Read the whole issue, then the project's contributing guide.
- Comment on the issue to say you are picking it up — it saves two people doing the same work.
- Fork the repository and make your change on a branch.
- Open a pull request that references the issue number.
Research direction
The issue names only the AXI crossbar and V1 block-level DV, with no files, tests, scope, or acceptance criteria. First clarify which V1 scenarios and verification artifacts are required and where the relevant block is located. Done should mean the agreed block-level DV work for the AXI crossbar V1 is implemented and passing.
Written by the indexing model from the issue text.
Assessment
- Domain
- embedded-iot, testing
- Issue type
- Feature
- Difficulty
- 4/5
- Estimated time
- 3-5 days
- Activity status
- Quiet
- Clarity
- Needs clarification
- Newbie friendliness
- 25/100